1. Field of the Invention
The present invention relates generally to the use of multiple processors in a file server, and in particular to such a file server using physical processors having more than one set of central processor registers sharing an on-chip cache and multiple functional units. Each set of central processor registers functions as a respective logical processor.
2. Background Art
With the advent of cache memory, there has been an advantage to coupling multiple processors to a shared memory for general-purpose applications. By providing a dedicated cache memory for each processor, each processor can operate at nearly 100% of the time by accessing cache memory most of the time and accessing the shared memory during a small percentage of the time. The shared memory can also be used for communication between the processors. Since the introduction of the Intel PENTIUM (Trademark) microprocessor, the caches and memory management circuitry have been integrated onto commodity processor chips together with special machine instructions to facilitate the construction of multiprocessor systems.
One application for a multiprocessor system is a network server. A conventional operating system for a network server is the Unix system. The problem of converting the Unix system for execution on a multiprocessor architecture is discussed in H. S. Raizen and S. C. Schwarm, “Building a Semi-Loosely Coupled Multiprocessor System Based on Network Process Extension,” 1991 USENIX Symposium on Experiences with Distributed and Multiprocessor Systems.
More recently, it has become practical to put more than one central processing unit register set on a single chip. The Intel® PENTIUM IV XEON (Trademark) processor, for example, has two central processor register sets that share an on-chip cache and multiple functional units. Each register set functions as a separate logical processor. The processing of a multi-threaded application by the two logical processors on the same physical processor is called “Hyper-Treading technology.” See, for example, “Building Cutting-Edge Server Applications, Intel® Xeon™ Processor Family Features the Intel NetBurst™ Microarchitecture with Hyper-Threading Technology,” Intel Corporation, 2002, and Chapter 7, “Multiprocessor and Hyper-Treading Technology,” in the Intel® Pentium™ 4 and Intel® Xeon™ Processor Optimization Reference Manual, Order No. 248966-05, Intel Corporation, 2002.
For use in servers, it is practical to put at least two of the Intel® Pentium™ IV Xeon™ processors on a single circuit board. For example, Intel Corporation offers a server board No. SE7500WV2 having sockets for two Xeon™ processors, sockets for up to 12 gigabytes of random access memory (RAM), dual (two-way) interleaved memory, triple-peer PCI/PCI-X buses and slots for the buses, two integrated server network connections, an optional dual-channel Redundant Array of Inexpensive Disk (RAID) controller, a video controller with eight megabytes of video memory, and server management software and hardware including serial data/console redirection over Local Area Network (LAN), integrated remote management, event alerting, and proactive fault management. A variety of server boards, including two or four Xeon™ processors, are offered by ServerWorks, 2451 Mission College Blvd., Santa Clara, Calif. 95404.
Although multi-processor server boards are now readily available, there is a need for server software that can effectively use the Hyper-Threading technology. The time and cost of development of the server software has been a factor delaying the introduction of the Hyper-Threading technology into the server market and preventing the attainment of all of the benefits of the Hyper-Threading technology. To address this problem, Intel Corporation distributes on its web site free documentation regarding how to divide an application into multiple threads (such as the above-cited Intel® Xeon™ Processor Optimization Reference Manual), and also offers a number of threading tools (such as the Intel® KAP/Pro Toolset for OpenMP) for adding parallelism to existing software.